Wednesday 30 January 2013

8051 LEARN YOURSELF - TUTORIAL part 1




            This part briefs gives the introduction of 8051, architecture, Stack and its memory organization. The next part will contain the SFR description and Instruction Set summary.


Microprocessors and Microcontrollers:
          Microprocessors and microcontrollers stem from the same basic idea, are made by the same people, and are sold to the same types of system designers and programmers. What is the difference between the two.







Comparing Microprocessors and Microcontrollers:
          The contrast between a microcontroller and a microprocessor is best exemplified by the fact that most microprocessors have many operational codes (opcodes) for moving data from external memory to the CPU; microcontrollers may have one, or two. Microprocessors may have one or two types of bit-handling instructions; microcontrollers will have many. To summarize, the microprocessor is concerned with rapid movement of code and data from external addresses to the chip; the microcontroller is concerned with rapid movement of bits within the chip. The microcontroller can function as a computer with the addition of no external digital parts; the microprocessor must have many additional parts to be operational. 
          Microprocessor is an IC which has only the CPU inside them i.e. only the processing powers such as Intel’s Pentium 1,2,3,4, core 2 duo, i3, i5 etc. These microprocessors don’t have RAM, ROM, and other peripheral on the chip. A system designer has to add them externally to make them functional. Application of microprocessor includes Desktop PC’s, Laptops, notepads etc.
          But this is not the case with Microcontrollers. Microcontroller has a CPU, in addition with a fixed amount of RAM, ROM and other peripherals all embedded on a single chip. At times it is also termed as a mini computer or a computer on a single chip. Today different manufacturers produce microcontrollers with a wide range of features available in different versions. Some manufacturers are ATMEL, Microchip, TI, Freescale, Philips, Motorola etc.  Microcontrollers are designed to perform specific tasks. Specific means applications where the relationship of input and output is defined. Depending on the input, some processing needs to be done and output is delivered.



A brief history of the 8051
          The 8051 is the original member of the 8051 family. Intel refers to it as MCS-51. The main features of the 8051 are
o   4K Bytes of In-System Reprogrammable Flash Memory
o   Fully Static Operation: 0 Hz to 24 MHz
o   Three-level Program Memory Lock
o   128 x 8-bit Internal RAM
o   32 Programmable I/O Lines
o   Two 16-bit Timer/Counters
o   Six Interrupt Sources
o   Programmable Serial Channel
o   Low-power Idle and Power-down Modes

8051 microcontroller
          In 1981, Intel Corporation introduced an 8-bit microcontroller called the8051. This microcontroller had 128 bytes of RAM, 4K bytes of on-chip ROM, two timers, one serial port, and four ports (each 8-bits wide) all on a single chip. At the time it was also referred to as a "system on a chip." The 8051 is an 8-bit processor, meaning that the CPU can work-on only 8 bits of data at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. The 8051 has a total of four I/O ports, each 8 bits wide. Although the 8051 can have a maximum of 64K bytes of on-chip ROM, many manufacturers have put only 4K bytes on the chip. This will be discussed in more detail later. The 8051 became widely popular after Intel allowed other manufacturers to make and market any flavour of the 8051 they use with the condition that they remain code-compatible with the 8051. This has led to many versions of the 8051 with different speeds and amounts of on-chip ROM marketed by more than half a dozen manufacturers. Next we review some of them. It is important to note that although there are different flavours of the 8051 in terms Table 1-3: Features of the 8051 of speed and amount of on-chip ROM, they are all compatible with the original 8051 as far as the instructions are Feature Quantity concerned. This means that if you write your program for ROM 4K bytes one, it will run on anyone of them regardless of the J11an- RAM 128 bytes manufacturer.

Figure 1.3
          The most widely used registers of the 8051 are A (accumulator), B, R0, R1, R2, R3, R4, R5, R6, R7, DPTR (data pointer), and PC (program counter). All of the above registers are 8-bits, except DPTR and the program counter. The accumulator, register A, is used for all arithmetic and logic instructions.
AT89C51 PIN DIAGRAM

Program Counter and Data Pointer
          The 8051 contains two 16-bit registers: the program counter (PC) and the data pointer (DPTR). Each is used to hold the address of a byte in memory. Program instruction bytes are fetched from locations in memory that are addressed by the PC. Program ROM may be on the chip at addresses 0000h to 0FFFh, external to the chip for addresses that exceed 0FFFh, or totally external for all addresses from 0000h to FFFFh. The PC is automatically incremented after every instruction byte is fetched and may also be altered by certain instructions. The PC is the only register that does not have an internal address. The DPTR register is made up of two 8-bit registers, named DPH and DPL, that are used to furnish memory addresses for internal and external code access and external data access. The DPTR is under the control of program instructions and can be specified by its 16-bit name, DPTR, or by each individual byte name, DPH and DPL. DPTR does not have a single internal address; DPH and DPL are each assigned an address.

The Stack and the Stack Pointer
          The stack refers to an area of internal RAM that is used in conjunction with certain opcodes to store and retrieve data quickly and for temporary purposes. The 8-bit stack pointer (SP) register is used by the 8051 to hold an internal RAM address that is called the "top of the stack." The address held in the SP register is the location in internal RAM where the last byte of data was stored by a stack operation.

How stacks are accessed in the 8051
If the stack is a section of RAM, there must be registers inside the CPU to point to it. The register used to access the stack is called the SP (stack pointer) register.
          The stack pointer in the 8051 is only 8 bits wide, which means that it can take values or 00H to FFH. When the 8051 is powered up, the SP register contains value 07. This means that RAM location 08 is the first location being used for the stack by the 8051.
          The storing of a CPU register in the stack is called a PUSH, and loading the contents of the stack back into a CPU register is called a POP.
          When data is to be placed on the slack, the SP increments before storing data on the stack so that the stack grows up as data is stored, this is called the PUSH operation. As data is retrieved from the stack, the byte is read from the stack, and then the SP decrements to point to the next available byte of stored data. This is called the POP operation.


Memory Organisation
8051 memory consists of 128-byte internal RAM and internal code memory (EEPROM or flash memory) of 4KB.
The external memory, both RAM and ROM, can be upto 64KB addressable by 16 bit address each 8 bit wide.
         


The internal RAM organized into three distinct areas:
1.    Thirty-two bytes from address 00h to IFh that make up 32 working registers organized as four banks of eight registers each. The four register banks are numbered 0 to 3 and are made up of eight registers named R0 to R7. Each register can be addressed by name (when its bank is selected) or by its RAM address. Thus R0 of bank 3 is R0 (if bank 3 is currently selected) or address 18h (whether bank 3 is selected or not). Bits RS0 and RS1 in the PSW determine which bank of registers is currently in use at any time when the program is running. Register banks not selected can be used as general-purpose RAM. Bank 0 is selected upon reset.
2.    A bit-addressable area of 16 bytes occupies RAM byte addresses 20h to 2Fh, forming a total of 128 addressable bits. An addressable bit may be specified by its bit address of 00h to 7Fh, or 8 bits may form any byte address from 20h to 2Fh.
3.    A general-purpose RAM area above the bit area, from 30h to 7Fh, addressable as bytes.
 

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