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Friday 30 January 2015

I2C Header File for AVR By Elecdude


/************************************************************************************/

 Author: ElecDude
         admin@elecdude.com        

 Please report bugs, errors, modifications, etc. Thank you

 Copyright - 2015 - ElecDude

 USAGE AND REDISTRIBUTION OF THIS SOURCE CODE IS PERMITTED PROVIDED THAT
 THE FOLLOWING CONDITIONS ARE MET:

    1. REDISTRIBUTIONS OF SOURCE CODE MUST RETAIN THE ABOVE ORIGINAL COPYRIGHT
  NOTICE AND THE ASSOCIATED DISCLAIMER, THIS LIST OF CONDITIONS AND
  THE FOLLOWING DISCLAIMER.
    2. REDISTRIBUTIONS IN BINARY FORM MUST REPRODUCE THE ABOVE COPYRIGHT
  NOTICE, THIS LIST OF CONDITIONS AND THE FOLLOWING DISCLAIMER IN
  THE DOCUMENTATION AND/OR OTHER MATERIALS PROVIDED WITH THE
  DISTRIBUTION.

 THIS IS PROVIDED WITHOUT ANY  EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
 BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 A PARTICULAR PURPOSE ARE DISCLAIMED. TO BE USED FOR LEARNING PURPOSE ONLY.  
 IN NO EVENT SHALL THE CONTRIBUTORS OR COPYRIGHT OWNER, BE LIABLE FOR ANY DIRECT,
 INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ARISING IN ANY WAY OUT OF THE
 USE OF THIS SOURCE CODE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

/*************************************************************************************/
/**************************************************************
 I2C  TWI  ROUTINES
void I2CInit();
void I2CStart();
void I2CStop();
unsigned char I2CWriteSLA(unsigned char sla);
unsigned char I2CWriteByte(unsigned char dat);
unsigned char I2CReadByte(unsigned char *data); */

#ifndef _I2C_H
#define _I2C_H

/*******************MACRO's DEFINITION******************************/
#ifndef BIT
#define BIT(x) _BV(x)
#endif

#ifndef SETBIT
#define SETBIT(x,b) x|=_BV(b);
#endif

#ifndef CLEARBIT
#define CLEARBIT(x,b) x&=~_BV(b);
#endif

#ifndef TOGGLEBIT
#define TOGGLEBIT(x,b) x^=_BV(b);
#endif

#ifndef CHECKBIT
#define CHECKBIT(x,b) (x & _BV(b))
#endif
/*******************************************************************/


#define TRUE 1
#define FALSE 0

void I2CInit()
 {
  TWBR=0x04;//F=100KHz
  TWSR|=((1<<TWPS1) | (1<<TWPS0));

  SETBIT(TWCR,TWEN)
 }

void I2CStart()
{
 TWCR=(1<<TWINT)| (1<<TWSTA)|(1<<TWEN);
 while(!(TWCR & (1<<TWINT)));

}

void I2CStop()
{
 TWCR=(1<<TWINT)| (1<<TWEN)|(1<<TWSTO);
 //while(!(TWCR & (1<<TWSTO)));

}

unsigned char I2CWriteSLA(unsigned char sla)
 {

  TWDR=sla;
  TWCR=(1<<TWEN) | (1<<TWINT);
  while(!(TWCR & (1<<TWINT)));
  if((TWSR & 0xF8)==0x18 || (TWSR & 0xF8)==0x40)
  //18 = SLA+W sent & ACK returned
  return TRUE;//40 = SLA+R sent & ACK returned
  else
    return FALSE;
}

unsigned char I2CWriteByte(uint8_t dat)
 {
  unsigned char
  TWDR=dat;

  TWCR=(1<<TWEN) | (1<<TWINT);
  while(!(TWCR & (1<<TWINT)));


  if((TWSR & 0xF8)==0x28 || (TWSR & 0xF8)==0x30)
  return TRUE; //28= Data sent, ACK returned.  30 data sent, NACK retuned
  else
    return FALSE;
}

unsigned char I2CReadByte(unsigned char *data)
 {
 
  TWCR&=(~(1<<TWEA));
 
  CLEARBIT(TWCR,TWINT)
  while(!(TWCR & (1<<TWINT)));

  if((TWSR & 0xF8)==0x50 || (TWSR & 0xF8)==0x58)
   {
  *data=TWDR; //58 = data READ & NACK retuned
return TRUE; //50 = Data READ & ACK returned
    }
  else
    return FALSE;
}

/***************************************************************************/
#endif
I2C.H

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interfacing DS1307 (RTC) with AVR By Elecdude



//***********************************************************************************//
 Author: ElecDude
         admin@elecdude.com        

 Please report bugs, errors, modifications, etc. Thank you

 Copyright - 2015 - ElecDude

 USAGE AND REDISTRIBUTION OF THIS SOURCE CODE IS PERMITTED PROVIDED THAT
 THE FOLLOWING CONDITIONS ARE MET:

    1. REDISTRIBUTIONS OF SOURCE CODE MUST RETAIN THE ABOVE ORIGINAL COPYRIGHT
  NOTICE AND THE ASSOCIATED DISCLAIMER, THIS LIST OF CONDITIONS AND
  THE FOLLOWING DISCLAIMER.
    2. REDISTRIBUTIONS IN BINARY FORM MUST REPRODUCE THE ABOVE COPYRIGHT
  NOTICE, THIS LIST OF CONDITIONS AND THE FOLLOWING DISCLAIMER IN
  THE DOCUMENTATION AND/OR OTHER MATERIALS PROVIDED WITH THE
  DISTRIBUTION.

 THIS IS PROVIDED WITHOUT ANY  EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
 BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 A PARTICULAR PURPOSE ARE DISCLAIMED. TO BE USED FOR LEARNING PURPOSE ONLY.  
 IN NO EVENT SHALL THE CONTRIBUTORS OR COPYRIGHT OWNER, BE LIABLE FOR ANY DIRECT,
 INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ARISING IN ANY WAY OUT OF THE
 USE OF THIS SOURCE CODE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//***********************************************************************************//


                  FUNCTIONS IN DS1307.H
```````````````````````
    DSinit();        To initialise DS1307 RTC chip

DSWriteTime(h, m, s); To write time hr, min, sec to RTC

    DSReadTime(&h, &m, &s); To read time hr, min, sec from RTC

    DSWriteDate(d, m, y); To write date to RTC

    DSReadDate(&d, &m, &y); To read date from RTC
 
    DSReadDay(&dy);     To read day from RTC

    DSWriteDay(dy); To write day to RTC
***********************************************************/

#ifndef _ds1307_H
#define _ds1307_H
#include "I2C.h"


//declare variables for hour, minutes, seconds, day, date, month & year.
unsigned char h=0,m=0,s=0; //comment these lines if defined in Main.c
unsigned char dy=0,dd=0,mm=0,yy=0; //comment these lines if defined in Main.c

/*_________________________________________________________________________
                   DECLARATION FOR DS1307                   */
#define DS_R 0xD1   //7 bit SLA + 1(read bit)
#define DS_W 0xD0 //7 bit SLA + 0(write bit)

//DS1307 RTC Registers addresses....
#define secr   0x00
#define minr   0x01
#define hrr 0x02
#define dayr   0x03
#define dater 0x04
#define monr   0x05
#define yrr 0x06
#define conr 0x07
/*_________________________________________________________________________*/
// DSWrite(addr1,data1);
// To write 'data1' in the 'addr1' location
unsigned char DSWrite(unsigned char addr,uint8_t data)
{
//_delay_us(500);
  I2CStart();

  if(! (I2CWriteSLA(DS_W)) )//Select device
return FALSE;

  if(! (I2CWriteByte(addr)) )//select destn. register
return FALSE;

  if(! (I2CWriteByte(data)) )//write data
return FALSE;
  I2CStop();
  return TRUE;
}

// DSRead(addr1,&data1);
// To data 'data1' from the 'addr1' location
unsigned char DSRead(unsigned char addr,unsigned char *data)
{
  I2CStart();
  if(! (I2CWriteSLA(DS_W)) )//select device
return FALSE;
  if(! (I2CWriteByte(addr)) )//select register
return FALSE;

//_______________Send Repeat start for read_____________
  I2CStart();

  if(! (I2CWriteSLA(DS_R)) )// select device in MASTER READ mode
return FALSE;
  if(! (I2CReadByte(data)) )//read data form device
return FALSE;

  I2CStop();
  return TRUE;
}
/*_________________________________________________________________________*/
// DSinit();
        // To initialise DS1307 RTC chip
void DSinit()
{
unsigned char x;
DSRead(secr,&x);
x&=(~(1<<CH)); //Clear CH Bit
DSWrite(secr,x);

x=0x10;
DSWrite(conr,x);//enable out @ 1Hz
}

// DSWriteTime(h, m, s)
// To write time hr, min, sec to RTC
DSWriteTime(unsigned char h, uns
igned char m, unsigned char s)
{
DSWrite(secr,s);
DSWrite(minr,m);
DSWrite(hrr,h);
}

// DSReadTime(&h, &m, &s)
// To read time hr, min, sec from RTC
DSReadTime(unsigned char *h, unsigned char *m, unsigned char *s)
{
DSRead(secr,&s);
DSRead(minr,&m);
DSRead(hrr,&h);
}

// DSWriteDate(d, m, y)
// To write date to RTC
DSWriteDate(unsigned char dd, unsigned char mm, unsigned char yy)
{
DSWrite(dater,dd);
DSWrite(monr,mm);
DSWrite(yrr,yy);
}
// DSReadDate(&d, &m, &y)
// To read date from RTC
DSReadDate(unsigned char *h, unsigned char *m, unsigned char *s)
{
DSRead(dater,&dd);
DSRead(monr,&mm);
DSRead(yrr,&yy);
}

// DSReadDay(&dy)
// To read day from RTC
DSReadDay(unsigned char *dy)
{
DSRead(dayr,&dy);
}
// DSWriteDay(dy)
// To write day to RTC
DSWriteDay(unsigned char dy)
{
DSWrite(dayr,dy);
}

#endif
DS1307.H 

Please follow this link for I2C header File 

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Using Perl in your VHDL Design By Elecdude


/************************************************************************************/
 Author: ElecDude
         admin@elecdude.com        

 Please report bugs, errors, modifications, etc. Thank you

 Copyright - 2015 - ElecDude

 USAGE AND REDISTRIBUTION OF THIS SOURCE CODE IS PERMITTED PROVIDED THAT
 THE FOLLOWING CONDITIONS ARE MET:

    1. REDISTRIBUTIONS OF SOURCE CODE MUST RETAIN THE ABOVE ORIGINAL COPYRIGHT
  NOTICE AND THE ASSOCIATED DISCLAIMER, THIS LIST OF CONDITIONS AND
  THE FOLLOWING DISCLAIMER.
    2. REDISTRIBUTIONS IN BINARY FORM MUST REPRODUCE THE ABOVE COPYRIGHT
  NOTICE, THIS LIST OF CONDITIONS AND THE FOLLOWING DISCLAIMER IN
  THE DOCUMENTATION AND/OR OTHER MATERIALS PROVIDED WITH THE
  DISTRIBUTION.

 THIS IS PROVIDED WITHOUT ANY  EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
 BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 A PARTICULAR PURPOSE ARE DISCLAIMED. TO BE USED FOR LEARNING PURPOSE ONLY.  
 IN NO EVENT SHALL THE CONTRIBUTORS OR COPYRIGHT OWNER, BE LIABLE FOR ANY DIRECT,
 INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ARISING IN ANY WAY OUT OF THE
 USE OF THIS SOURCE CODE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
/************************************************************************************/

print "\nWelcome to ElecDude...";
print "\n Enter file name in FULL (header1.h, file1.c,  module1.v, entity1.vhd,...) :";
$finp = <STDIN>;
chomp $finp;
print "\n ";

$char="";
$char1="";

if ($finp =~ m/.[chv]$/i) { #// //
    $char1="// // // // // // // // // // // // // // // // // // // // // // // // // // // // //  // ";
$char="//";
print "\n Adding copyright for C/Verilog..";
} elsif($finp =~ m/.pl$/i) {# # #
$char1="#   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #   #  # ";
$char="#";
print "\n Adding copyright for PERL..";
} elsif($finp =~ m/.vhd$/i) {# -- --
$char1="--  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  --  -- ";
$char="--";
print "\n Adding copyright for VHDL..";
} else {
print "Couldn't identify input file type...\n";
exit;
}
# exit;
open($DCR, "<ED_Copyright.txt") or die "Couldn't open file ED_Copyright.txt";
open(DATA_O, ">new_$finp") or die "Couldn't open file new_$finp";

print DATA_O ("$char1\n");
while (!eof($DCR)) 
{
  my $line1 = <$DCR>;
  chomp $line1;
  print DATA_O ("$char $line1\t$char \n");
}
close($DCR);
print DATA_O ("$char1\n");

open($DIN, "<$finp") or die "Couldn't open file $finp.";
print "\n Adding the Source File contents...";
while (!eof($DIN)) 
{
  my $line1 = <$DIN>;
  chomp $line1;
  print DATA_O ($line1, "\n");
}
close($DIN);
close(DATA_O);

print "\n File (new_$finp) with Copyright contents created succesfully";
system "start new_$finp";

print "\n Press ENTER key to end..."; $key = getc(STDIN);


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Thursday 29 January 2015

ElecDude Calculator Using Labview

ElecDude Calculator



Elecdude Calc using Labview . 

This is the Example Coding for Event Structure and String Usage in labview.

Source file is added in this Post . 

 Elecdude CALC

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COMMONLY USED VHDL CONSTURCTS

COMMONLY USED VHDL CONSTURCTS

-- ********************** VHDL EXAMPLE CONTRUCTS

******************************************

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.NUMERIC_STD.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;

USE IEEE.STD_LOGIC_SIGNED.ALL;

USE IEEE.STD_LOGIC_TEXTIO.ALL;

USE STD.TEXTIO.ALL;

NUMERIC_STD TOGETHER

use work.my_pckg.all;

-- USE IEEE.STD_LOGIC_ARITH.ALL; --NEVER USE STD LOGIC ARITH &

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~

-- To print current simulation time

report "Current Simulation time @ " & time'image(now);

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~

-- GENERIC EXAMPLE

ENTITY parity_det IS

    GENERIC (n : INTEGER := 7);

    PORT ( input: IN BIT_VECTOR (n DOWNTO 0);

               output: OUT BIT);

END parity_det;

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~

-- CLOCK signal generation

signal sys_clk : bit := '0';

constant sys_clk_period : time := 100 ns; -- Clock period definitions

-- Clock process definitions

sys_clk_process :process

 begin

sys_clk <= '0';

wait for sys_clk_period/2;

sys_clk <= '1';

wait for sys_clk_period/2;

 end process;

 -- Clock process definition - Method 2

sys_clk_process :process

 begin

 end process;

sys_clk <= not sys_clk after sys_clk_period/2;

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~

--Clock Generator Procedure - Period & Offset defined

procedure clk_gen(signal clk: out std_logic; constant OFS: time; constant PERIOD:

time) is

begin

-- Check the arguments

assert ((PERIOD/2) /= 0 fs) report "clk_plain: High time is zero; time resolution to

large for frequency" severity FAILURE;

-- Generate a clock cycle

 clk <= '0';

 wait for OFS;

 loop

  clk <= '1';

  wait for PERIOD/2;

  clk <= '0';

  wait for PERIOD/2;

 end loop;

end procedure;

clk_gen(clk,12 ns,20 ns); --PERIOD= 20ns

clk_gen(clk,12 ns,(1 sec/100.0E+6)); --Freq= 100MHz

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~~

-- FUNCTION EXAMPLE

FUNCTION conv_integer (SIGNAL vector: STD_LOGIC_VECTOR)

RETURN INTEGER IS

VARIABLE result: INTEGER RANGE 0 TO 2**vector'LENGTH-1;

BEGIN

IF (vector(vector'HIGH)='1') THEN

result:=1;

ELSE

result:=0;

END IF;

FOR i IN (vector'HIGH-1) DOWNTO (vector'LOW) LOOP

result:=result*2;

IF(vector(i)='1') THEN

END IF;

END LOOP;

RETURN result;

result:=result+1;

END conv_integer;

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~~~

-- Stimulus process example

stim_proc: process

begin

 -- hold reset state for 100ms.

 wait for 100 ns;

 --Sample way of setting inputs - reset used as a redundant example.

reset <= '1';

wait for 10 ns;

reset <= '0';

wait for 10 ns;

wait;

end process;

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~~

-- SOME COMMONLY USED CONTROL STRUCTURE SYNTAXES

------ With WHEN/ELSE -------------------------

outp <= "000" WHEN (inp='0' OR reset='1') ELSE

"001" WHEN ctl='1' ELSE

"010";

---- With WITH/SELECT/WHEN --------------------

WITH control SELECT

output <= "000" WHEN reset,

"111" WHEN set,

UNAFFECTED WHEN OTHERS;

---- with WITH/SELECT/WHEN -----

WITH sel SELECT

   y <= a WHEN "00", -- notice "," instead of ";"

b WHEN "01",

c WHEN "10",

d WHEN OTHERS; -- cannot be "d WHEN "11" "

---- CASE ------------------------

case sel is

when "00"=> y <= a;

when "01"=> y <= b;

when "10"=> y <= c; --when "00"=> y <= a;

when others=> y<=d;

end case;

---- tristate buffer WHEN/ELSE

output <= input WHEN (ena='0') ELSE

  (OTHERS => 'Z');

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~

-- Detect Rising edge

IF RISING_EDGE(clk)

-- Detect falling edge

if falling_edge (clk)

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~

--State Machine Declaration

type STATES is (s0,s1,s2);

signal cur,nxt: STATES;

 StateTrans:process (clk, rstb)

 begin

if (rstb = '0') then

cur <= s0;

elsif (RISING_EDGE(clk)) then

cur <= nxt;

end if;

 end process StateTrans;

 FSM_combi:process(cur,<inputs>) begin

case cur is

 when s0=> nxt<=s1;

 when s1=> nxt<=s2;

 when s2=> nxt<=s0;

 when OTHERS=> nxt<=s0;

end case;

 end process FSM_combi;

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

~~~~~~~~~~~~~~~~~~~~~~~~~

--MEMORY ARRAY - RAM ROM

type mem_array is array (0 to 15) of std_logic_vector (7 downto 0);

constant rom: mem_array := ( “11111011”, “00010010”, “10011011”, “10010011”,

“01011011”, “00111010”,

“00010010”, “10101001”, “00110110”, “11011011”, “01010010”);

data <= rom(address); -- data = STD vector & address= integer

“11111011”, “00010010”, “10100011”, “10011010”, “01111011”,

signal RAM: mem_array := ( “11111011”, “00010010”, “10011011”, “10010011”,

“01011011”, “00111010”,

“00010010”, “10101001”, “00110110”, “11011011”, “01010010”);

“11111011”, “00010010”, “10100011”, “10011010”, “01111011”,

data <= RAM(conv_integer(addrs)); -- data & addrs = STD vector



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